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  mb39c015 2ch dc/dc converter ic datasheet cypress semiconductor corporation ? 198 champion court ? san jose , ca 95134-1709 ? 408-943-2600 document number: 002-08364 rev. *a revised march 1, 2016 the mb39c015 is a current mode type 2-channel dc/dc converter ic built-in voltage detection, synchronous rectifier, and down conversion support. the device is integrated with a switching fe t, oscillator, error amplifier, pwm control circuit, reference voltage source, and voltage detection circuit. external inductor and decoupling capacitor are needed only for the external component. as combining with external parts enables a dc/dc converter with a compact and high load response characteristic, this is suitab le as the built-in power supply for such as mobile phone/pda, dvds, and hdds. features high efficiency : 96% (max) output current (dc/dc) : 800 ma/ch (max) input voltage range : 2.5 v to 5.5 v operating frequency : 2.0 mhz (typ) no flyback diode needed low dropout operation : for 100% on duty built-in high-precision reference voltage generator : 1.30 v ? 2% consumption current in shutdown mode : 1 ? a or less built-in switching fet : p-ch mos 0.3 ? (typ) n-ch mos 0.2 ? (typ) high speed for input and load transient response in the current mode over temperature protection packaged in a compact package : qfn-24 applications flash roms mp3 players electronic dictionary devices surveillance cameras portable gps navigators dvd drives ip phones network hubs mobile phones etc.
mb39c015 document number: 002-08364 rev. *a page 2 of 43 contents pin assignment ................................................................ 3 pin descriptions ............................................................... 4 i/o pin equivalent circuit diagram ................................. 5 block diagram .................................................................. 6 function of each block .................................................... 8 absolute maximum ratings .......................................... 10 recommended operating conditions .......................... 11 electrical characteristics ............................................... 12 test circuit for measuring typical operating characteristics .............................................. 14 application notes ........................................................... 15 selection of components ........ .............. .............. ....... 15 output voltage setting .............................................. 16 about conversion efficiency . ...................................... 16 power dissipation and heat considerations ............... 17 xpor threshold voltage setting [vporh, vporl] ....................................................... 18 transient response ................ .............. .............. ........ 19 board layout, design example ................................... 20 example of standard operation characteristics ........ 21 application circuit examples ........................................ 29 application circuit examples ........................................ 30 usage precautions ......................................................... 32 ordering information ...................................................... 32 rohs compliance information of lead (pb) free version .................................................. 33 marking format (lead free version) ....................... 33 labeling sample (lead free version) ...................... 33 evaluation board specification ..................................... 34 ev board ordering information .................................... 40 package dimension ........................................................ 41
mb39c015 document number: 002-08364 rev. *a page 3 of 43 1. pin assignment lx2 lx1 dgnd2 dgnd2 dgnd1 dgnd1 ctlp 19 20 21 22 23 24 12 11 10 9 8 7 123456 18 17 16 15 14 13 vref ctl2 ctl1 agnd avdd dvdd2 dvdd2 out2 mode2 v refin2 xpor dvdd1 dvdd1 out1 mode1 vrefin 1 vdet (top view) (lcc-24p-m10)
mb39c015 document number: 002-08364 rev. *a page 4 of 43 2. pin descriptions pin no. pin name i/o description 1 ctlp i voltage detection circuit block control input pin. (l : voltage detection function stop, h : normal operation) 2/3 ctl2/ctl1 i dc/dc converte r block control input pin. (l : shut down, h : normal operation) 4 agnd ? control block ground pin. 5 avdd ? control block power supply pin. 6 vref o reference voltage output pin. 7 vdet i voltage detection input pin. 8/23 vrefin1/vrefin2 i erro r amplifier (error amp) non-inverted input pin. 9/22 mode1/mode2 i use pin at l level or leave open. 10/21 out1/out2 i output voltage feedback pin. 11, 12/ 19, 20 dvdd1/dvdd2 ? drive block power supply pin. 13/18 lx1/lx2 o inductor connection output pin. high impedance during shut down. 14, 15/ 16, 17 dgnd1/dgnd2 ? drive block ground pin. 24 xpor o vdet circuit output pin. connected to an n-ch mos open drain circuit.
mb39c015 document number: 002-08364 rev. *a page 5 of 43 3. i/o pin equival ent circuit diagram gnd vdd lx1 , lx2 ? ? gnd vdd vref xpor ? gnd mode1 , mode2 ? gnd vdd ? ? gnd vdd ctl1 , ctl2 , ctlp gnd vdd ? ? vrefin1 , vrefin2 , vdet out1 , out2 ? ? * : esd protection device
mb39c015 document number: 002-08364 rev. *a page 6 of 43 4. block diagram 3 ? + ? + v in dvdd2 11, 12 19, 20 dvdd1 avdd vout1 v in xpor 5 16, 17 dgnd2 14, 15 dgnd1 agnd 4 on/off on/off on/off ctl1 out1 3 10 8 vrefin1 dac gnd 9 1 7 mode1 vdet ctlp ctl2 out2 v in dvdd1 i out comparator err amplifier err amplifier pwm logic control 3 ? + dvdd2 i out comparator pwm logic control lx1 13 vout2 lx2 18 24 1.30 v v ref vref vrefin2 mode2 gnd 6 21 2 23 22
mb39c015 document number: 002-08364 rev. *a page 7 of 43 current mode ? original voltage mode type : stabilize the output voltage by comparing two items below and on-duty control. ? voltage (v c ) obtained through negative feedback of the output voltage by error amp ? reference triangular wave (v tri ) ? current mode type : instead of the triangular wave (v tri ), the voltage (v idet ) obtained through i-v conversion of the sum of currents that flow in the oscillator (rectangular wave generation circuit) and sw fet is used. stabilize the output voltage by comparing two items below and on-duty control. ? voltage (v c ) obtained through negative feedback of the output voltage by error amp ? voltage (v idet ) obtained through i-v conversion of the sum of current that flow in the oscillator (rectangular wave generation circuit) and sw fet v in ton toff v tri v c vc v tri v in toff vc vc v idet s r ton sr-ff v idet q ? + ? + voltage mode type model current mode type model oscillator note : the above models illustrate th e general operatio n and an actual operation will be preferred in the ic.
mb39c015 document number: 002-08364 rev. *a page 8 of 43 5. function of each block pwm logic control circuit the built-in p-ch and n-ch mos fets are controlled for synchroni zation rectification according to the frequency (2.0 mhz) oscil lated from the built-in oscillator (square wave oscillation circuit). i out comparator circuit this circuit detects the current (i lx ) which flows to the external inductor from the built-in p-ch mos fet. by comparing v idet obtained through i-v conversion of peak current i pk of i lx with the error amp output, t he built-in p-ch mos fet is turned off via the pwm logic control circuit. error amp phase compensation circuit this circuit compares the output voltage to reference voltages such as vref. this ic has a built-in phase compensation circuit that is designed to optimize the operation of this ic.this needs neith er to be considered nor addition of a phase compensation circu it and an external phase compensation device. vref circuit a high accuracy reference voltage is generated with bgr (band gap reference) circuit. the output voltage is 1.30 v (typ). voltage detection (vdet) circuit the voltage detection circuit monitors the voltage at the vdet pi n. normally, use the xpor pin through pull-up with an external resistor. when the v det pin voltage reaches 0.6 v, it reaches the h level. timing chart example : (xpor pin pulled up to vin) protection circuit this ic has a built-in over-temperature prot ection circuit. the over-temperature protecti on circuit turns off both n-ch and p-c h switching fets when the junction temperature reaches ? 135 c . when the junction temperature comes down to ? 110 c , the switching fet is returned to the normal operation. since the pwm control circuit of this ic is in the control method in current mode, the cur rent peak value is also monitored and controlled as required. vin ctlp vdet x por v uvlo v thhp r v thlp r v uvlo : uvlo threshold voltage v thhpr , v thlpr : xpor threshold voltage
mb39c015 document number: 002-08364 rev. *a page 9 of 43 function table mode input output ctl1 ctl2 ctlp ch1 function ch2 function vdet function vref function shutdown mode l stopped operating mode h l l operation stopped stopped outputs 1.3 v l h l stopped operation stopped l l h stopped stopped operation h h l operation operation stopped l h h stopped operation operation h l h operation stopped operation hoperation
mb39c015 document number: 002-08364 rev. *a page 10 of 43 6. absolute maximum ratings *1 : power dissipation value between + 25 c and + 85 c is obtained by connecting these two points with straight line. *2 : when mounted on a four-layer epoxy board of 11.7 cm 8.4 cm *3 : connection at exposure pad with thermal via. (thermal via 9 holes) *4 : connection at exposure pad, without a thermal via. notes: ? the use of negative voltages below ? 0.3 v to the agnd, dgnd1, and dgnd2 pin may cr eate parasitic transistors on lsi lines, whic h can cause abnormal operation. ? this device can be damaged if the lx1 pin and lx2 pin are short-circuited to avdd and dvdd1/dvdd2, or agnd and dgnd1/dgnd2. warning: semiconductor devices can be permanently dam aged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. do not exceed these ratings. parameter symbol condition rating unit min max power supply voltage v dd avdd ? dvdd1 ? dvdd2 ? 0.3 ? 6.0 v signal input voltage v isig out1/out2 pins ? 0.3 v dd ? 0.3 v ctlp, ctl1/ctl2, mode1/mode2 pins ? 0.3 v dd ? 0.3 vrefin1/vrefin2 pins ? 0.3 v dd ? 0.3 vdet pin ? 0.3 v dd ? 0.3 xpor pull-up voltage v ixpor xpor pin ? 0.3 ? 6.0 v lx voltage v lx lx1/lx2 pins ? 0.3 v dd ? 0.3 v lx peak current i pk i lx1 /i lx2 ? 1.8 a power dissipation p d ta ? ? 25 c ? 3125* 1 , * 2 , * 3 mw ? 1563* 1 , * 2 , * 4 ta ? ? 85 c ? 1250* 1 , * 2 , * 3 mw ? 625* 1 , * 2 , * 4 operating ambient temperature ta ? ? 40 ? 85 c storage temperature t stg ? ? 55 ? 125 c
mb39c015 document number: 002-08364 rev. *a page 11 of 43 7. recommended operating conditions note : the output current from this device has a situation to decrease if the power supply voltage (v in ) and the dc/dc converter output voltage (v out ) differ only by a small amount. this is a result of slope compensation and will not damage this device. warning: the recommended operating conditions are requi red in order to ensure t he normal operation of the semiconductor device. all of the device's elec trical characteristics are warranted when the device is operated within these ranges. always use semiconductor devi ces within their recommended operating condition ranges. operation outside these ranges may adversely affe ct reliability and could result in device failure. no warranty is made with respect to uses, operati ng conditions, or combinations not represented on the data sheet. users considering application outs ide the listed conditions are advised to contact their representatives beforehand. parameter symbol condition value unit min typ max power supply voltage v dd avdd ? dvdd1 ? dvdd2 2.5 3.7 5.5 v vrefin voltage v refin ? 0.15 ? 1.30 v ctl voltage v ctl ctlp, ctl1, ctl2 0 ? 5.0 v lx current i lx i lx1 /i lx2 ? ? 800 ma vref output current i rout 2.5 v ? avdd ? dvdd1 ? dvdd2 < 3.0 v ? ? 0.5 ma 3.0 v ? avdd ? dvdd1 ? dvdd2 ? 5.5 v ? ? 1 xpor current i por ? ? ? 1 ma inductor value l ? ? 2.2 ? ? h
mb39c015 document number: 002-08364 rev. *a page 12 of 43 8. electrical characteristics (ta ? ? 25 c , avdd ? dvdd1 ? dvdd2 ? 3.7 v, vout1/vout2 setting value ? 2.5 v, mode1/mode2 ? 0 v) * : standard design value (continued) parameter sym- bol pin no. condition value unit min typ max dc/dc converter block input current i refin 8, 23 vrefin ? 0.15 v to 1.3 v ? 100 0 ? 100 na output voltage v out 10, 21 vrefin ? 0.833 v, out ? ? 100 ma 2.45 2.50 2.55 v input stability line 2.5 v ? avdd ? dvdd1 ? dvdd2 ? 5.5 v* 1 ? ? 10 mv load stability load ? 100 ma out ? 800 ma ? ? 10 mv out pin input impedance r out out ? 2.0 v 0.6 1.0 1.5 m ? lx peak current i pk 13, 18 output shorted to gnd 0.9 1.2 1.7 a oscillation frequency fosc ? 1.6 2.0 2.4 mhz rise delay time t pg 2, 3, 10, 21 c1/c2 ? 4.7 ? f, out ? 0 a, out1/out2 : 0 90% v out ? 45 80 ? s sw nmos-fet off voltage v noff 13, 18 ? ? ? 10* ? mv sw pmos-fet on resistance r onp lx1/lx2 ? ? 100 ma ? 0.30 0.48 ? sw nmos-fet on resistance r onn lx1/lx2 ? ? 100 ma ? 0.20 0.42 ? lx leak current i leakm 0 ? lx ? vdd* 2 ? 1.0 ? ? 8.0 ? a i leakh vdd ? 5.5 v, 0 ? lx ? vdd* 2 ? 2.0 ? ? 16.0 ? a protection circuit block overheating protection (junction te m p . ) t otph ? ? ? 120* ? 135* ? 160* c t otpl ? 95* ? 110* ? 125* c uvlo threshold voltage v thhuv 5, 11, 12, 19, 20 ? 2.17 2.30 2.43 v v thluv 2.03 2.15 2.27 v uvlo hysteresis width v hysuv ? 0.08 0.15 0.25 v voltage detection circuit block xpor threshold voltage v thhpr 7 ? 575 600 625 mv v thlpr 558 583 608 mv xpor hysteresis width v hyspr ? ? 17 ? mv xpor output voltage v ol 24 xpor ? 25 ? a ? ? 0.1 v xpor output current i oh xpor ? 5.5 v ? ? 1.0 ? a
mb39c015 document number: 002-08364 rev. *a page 13 of 43 (continued) (ta ? ? 25 c , avdd ? dvdd1 ? dvdd2 ? 3.7 v, vout1/vout2 setting value ? 2.5 v, mode1/mode2 ? 0 v) * 1 : the minimum value of avdd = dvdd1 = dvdd2 is the 2.5 v or vout setting value + 0.6 v, whichever is higher. * 2 : the + leak at the lx1 pin and lx2 pin includes the current of the internal circuit. * 3 : sum of the current flowing into th e avdd, the dvdd1, and the dvdd2 pins. * 4 : current consumption based on 100% on-duty (high side fet in full on state). the sw fet gate drive current is not included because the device is in full on state (no switch ing operation). also the load current is not included . parameter symbol pin no. condition value unit min typ max control block ctl threshold voltage v thhct 1, 2, 3 ? 0.55 0.95 1.45 v v thlct ? 0.40 0.80 1.30 v ctl pin input current i ictl 0 v ? ctlp/ctl1/ctl2 ? 3.7 v ? ? 1.0 ? a reference voltage block vref voltage v ref 6vref ? 0 ma 1.274 1.300 1.326 v vref load stability l oadref vref ? ? 1.0 ma ? ? 20 mv general shut down power supply current i vdd1 5, 11, 12, 19, 20 ctlp/ctl1/ctl2 ? 0 v state of all circuits off* 3 ? ? 1.0 ? a i vdd1h ctlp/ctl1/ctl2 ? 0 v, vdd ? 5.5 v state of all circuits off* 3 ? ? 1.0 ? a power supply current (dc/dc mode) i vdd31 1. ctlp ? 0 v, ctl1 ? 3.7 v, ctl2 ? 0 v 2. ctlp ? 0 v, ctl1 ? 0 v, ctl2 ? 3.7 v out ? 0 a ? 3.5 10 ma i vdd32 ctlp ? 0 v, ctl1/ctl2 ? 3.7 v, out ? 0 a ? 7.0 20.0 ma power supply current (voltage detection mode) i vdd5 ctlp ? 3.7 v, ctl1/ctl2 ? 0 v, ? 15 24 ? a power-on invalid current i vdd 1. ctl1 ? 3.7 v, ctl2 ? 0 v 2. ctl1 ? 0 v, ctl2 ? 3.7 v vout1/vout2 ? 90% out ? 0 a* 4 ? 1000 2000 ? a
mb39c015 document number: 002-08364 rev. *a page 14 of 43 9. test circuit for measuring typical operating characteristics note : these components are recommended based on the operating tests authorized. tdk : tdk corporation ssm : susumu co., ltd koa : koa corporation component specification vendor part number remarks r1 1 m ? koa rk73g1jttd d 1 m ? r3-1 r3-2 20 k ? 150 k ? ssm ssm rr0816-203-d rr0816-154-d vout1/vout2 ? 2.5 v setting r4 300 k ? ssm rr0816-304-d r5 510 k ? koa rk73g1jttd d 510 k ? r6 100 k ? ssm rr0816-104-d c1 4.7 ? f tdk c2012jb1a475k c2 4.7 ? f tdk c2012jb1a475k c3 0.1 ? f tdk c1608jb1e104k c6 0.1 ? f tdk c1608jb1h104k for adjusting slow start time l1 2.2 ? h tdk vlf4012at-2r2m vin vout1/ vout2 c1 4.7 f i out c2 4.7 f sw ctl1/ctl2 mode1/mode2 vref vrefin1/vrefin2 agnd out1/out2 avdd lx1/lx2 dvdd1/dvdd2 gnd r1 1 m v dd v dd mb39c015 dgnd1/dgnd2 vdet r4 300 k r5 510 k r6 100 k c6 0.1 f c3 4.7 f r3-1 20 k r3-2 150 k l1 2.2 h output voltage ? vrefin 3.01
mb39c015 document number: 002-08364 rev. *a page 15 of 43 10. application notes 10.1 selection of components selection of an external inductor basically it dose not need to design inductor. this ic is designed to operate efficiently with a 2.2 ? h inductor. the inductor should be rated for a saturation current higher than the lx peak current value during normal operating conditions, and should have a minimal dc resistance. (100 m ? or less is recommended.) lx peak current value i pk is obtained by the following formula. l : external inductor value i out : load current v in : power supply voltage v out : output setting voltage d : on-duty to be switched ( = v out /v in ) fosc : switching frequency (2.0 mhz) ex) when v in ? 3.7 v, v out ? 2.5 v, i out ? 0.8 a, l ? 2.2 ? h, fosc ? 2.0 mhz the maximum peak current value i pk ; i/o capacitor selection ? select a low equivalent series resistance (esr) for the vdd input capacitor to suppress dissipation from ripple currents. ? also select a low equivalent series resistance (esr) for the out put capacitor. the variation in the inductor current causes rip ple currents on the output capacitor which, in turn, causes ripple vo ltages an output equal to the amount of variation multiplied b y the esr value. the output capacitor value has a significant impact on the operating stability of the device when used as a dc/dc converter. therefore, fujitsu semic onductor generally recommends a 4.7 ? f capacitor, or a larger capacitor value can be used if ripple voltages are not suitable. if the v in /v out voltage difference is within 0.6 v, the use of a 10 ? f output capacitor value is recommended. ? types of capacitors ceramic capacitors are effective for reducing the esr and afford smaller dc/dc converter circuit. however, power supply functio ns as a heat generator, t herefore avoid to use capacitor with the f-temperature rating ( ? 80% to ? 20%).cypress recommends capacitors with the b-temperature rating ( ? 10% to ? 20%). normal electrolytic capaci tors are not recommended due to their high esr.tantalum capacitor will reduce esr, however, it is d angerous to use because it turns into short mode when damaged. if you insist on using a tantalum capacitor, cypress recommends the type with an internal fuse. i pk ? i out ? v in ? v out d 1 ? i out ? (v in ? v out ) v out l fosc 2 2 l fosc v in i pk ? i out ? (v in ? v out ) v out ? 0.8 a ? (3.7 v ? 2.5 v) 2.5 v : = 0.89 a 2 l fosc v in 2 2.2 ? h 2.0 mhz 3.7 v
mb39c015 document number: 002-08364 rev. *a page 16 of 43 10.2 output voltage setting the output voltage v out (v out1 or v out2 ) of this ic is defined by the voltage input to vrefin (vrefin1 or vrefin2) . supply the voltage for inputting to vrefin from an external power supply , or set the vref output by dividing it with resistors. the output voltage when the vrefin voltage is set by dividing t he vref voltage with resistors is shown in the following formula . note : refer to ? application circuit examples ? for the an example of this circuit. although the output voltage is defined according to the dividing ratio of resistance, se lect the resistance value so that the c urrent flowing through the resistance does not exceed the vref current rating (1 ma) . 10.3 about conversion efficiency the conversion efficiency can be improved by r educing the loss of the dc/dc converter circuit. the total loss (p loss ) of the dc/dc converter is roughly divided as follows : p loss = p cont + p sw + p c p cont : control system circuit loss (the power us ed for this ic to operate, including t he gate driving power for internal sw fets) p sw : switching loss (the loss caused during switching of the ic's internal sw fets) p c : continuity loss (the loss caused when currents flow through the ic's internal sw fets and external circuits ) v out ? 3.01 v refin , v refin ? r2 v ref r1 ? r2 (v ref ? 1.30 v) r2 r1 vref vrefin vref vrefin mb39c015
mb39c015 document number: 002-08364 rev. *a page 17 of 43 the ic's control circuit loss (p cont ) is extremely small, less than 100 mw (with no load). as the ic contains fets which can switch fa ster with less power, the continuity loss (p c ) is more predominant as the loss during heavy- load operation than the control circuit loss (p cont ) and switching loss (p sw ) . furthermore, the continuity loss (p c ) is divided roughly into the loss by internal sw fet on-resistance and by external inductor series resistance. p c = i out 2 (rdc + d r onp + (1 - d) r onn ) d : switching on-duty cycle ( = v out / v in ) r onp : internal p-ch sw fet on resistance r onn : internal n-ch sw fet on resistance rdc : external inductor series resistance i out : load current the above formula indicates that it is important to reduce rdc as much as possible to improve efficiency by selecting components. 10.4 power dissipation and heat considerations the ic is so efficient that no consideration is required in most cases. however, if the ic is used at a low power supply voltag e, heavy load, high output voltage, or high temperature, it requires further consideration for higher efficiency. the internal loss (p) is roughly obtained from the following formula : p = i out 2 (d r onp + (1 - d) r onn ) d : switching on-duty cycle ( = v out / v in ) r onp : internal p-ch sw fet on resistance r onn : internal n-ch sw fet on resistance i out : output current the loss expressed by the above formula is mainly continuity loss. the internal loss includes the switching loss and the contro l circuit loss as well but they are so small compared to the continuity loss they can be ignored. in this ic with r onp greater than r onn , the larger the on-duty cycle, the greater the loss. when assuming v in ? 3.7 v, ta ? ? 70 c , for example, r onp ? 0.36 ? and r onn ? 0.30 ? according to the graph ?mos fet on resistance vs. operating ambient temperature? . the ic's internal loss p is 123 mw at v out ? 2.5 v and i out ? 0.6 a. according to the graph ?power dissipation vs. operat ing ambient temperature?, the power dissipa tion at an operating ambient temperature t a of ? 70 c is 300 mw and the internal loss is smaller than the power dissipation.
mb39c015 document number: 002-08364 rev. *a page 18 of 43 10.5 xpor threshold voltage setting [v porh , v porl ] set the detection voltage by applying voltage to the vdet pin via an external resistor calculated according to this formula. v thhpr = 0.600 v v thlpr = 0.583 v example for setting detection voltage to 3.7 v r3 = 510 k ? r4 = 100 k ? v porh ? r3 ? r4 v thhpr r4 v porl ? r3 ? r4 v thlpr r4 v porh ? 510 k ? ? 100 k ? 0.600 ? 3.66 : = 3.7 [v] 100 k ? v porl ? 510 k ? ? 100 k ? 0.583 ? 3.56 : = 3.6 [v] 100 k ? r4 r3 1 m vin xpor avdd mb39c015 xpor vdet
mb39c015 document number: 002-08364 rev. *a page 19 of 43 10.6 transient response normally, i out is suddenly changed while v in and v out are maintained constant, responsiveness including the response time and overshoot/undershoot voltage is checked. as this ic has built-in error amp with an opt imized design, it shows good transient re sponse characteristics. however, if ringing upon sudden change of the lo ad is high due to the operating conditions, add capacitor c6 ( e.g. 0.1 ? f). (since this capacitor c6 changes the start time, check the star t waveform as well.) this action is not required for dac inp ut. r2 r1 vref vrefin vref vrefin1/ vrefin2 mb39c015 c6
mb39c015 document number: 002-08364 rev. *a page 20 of 43 10.7 board layout, design example the board layout needs to be designed to ensure the stable operation of this ic. follow the procedure below for designing the layout. ? arrange the input capacitor (cin) as close as possible to both the vdd and gnd pins. make a through hole (th) near the pins of this capacitor if the board has planes for power and gnd. ? large ac currents flow between this ic and the input capacitor (cin), output capacitor (co), and external inductor (l). group these components as close as possible to this ic to reduce the ov erall loop area occupied by this group. also try to mount the se components on the same surface and arrange wiring without throu gh hole wiring. use thick, short, and straight routes to wire the net (the layout by planes is recommended.). ? arrange a bypass capacitor for avdd as close as possible to both the avdd and agnd pins. make a through hole (th) near the pins of this capacitor if the board has planes for power and gnd. ? the feedback wiring to the out should be wired from the voltage output pin closest to the output capacitor (co). the out pin is extremely sensitive and should thus be kept wired away fr om the lx1 and pin lx2 pin of this ic as far as possible. ? if applying voltage to the vrefin1/vrefin2 pins through dividing resistors, arrange the resistor s so that the wiring can be ke pt as short as possible. also arrange them so that the gnd pin of vrefin1/vrefin2 resistor is close to the ic's agnd pin. further, provide a gnd exclusively for the control line so that the resistor can be connected via a path that does not carry cu rrent. if installing a bypass capacitor for the vr efin, put it close to the vrefin pin. ? if applying voltage to the vdet pin through dividing resistors, arrange the resistors so that the wiring can be kept as short as possible. also arrange so that the gnd pin of the vdet resistor is close to the ic's agnd pin. further, provide a gnd exclusive ly for the control line so that the resistor can be connected via a pa th that does not carry current. ? try to make a gnd plane on the surface to which this ic will be mounted. for efficient heat dissipation when using the qfn-24 package, cypress recommends providing a therma l via in the footprin t of the thermal pad. example of arranging ic sw system parts notes for circuit design the switching operation of this ic works by monitoring and controlling the peak current which, incidentally, serves as a form of short- circuit protection. however, do not leave t he output short-circuited for lo ng periods of time. if the output is short-circuited where v in < 2.9 v, the current limit value (peak current to the inductor) te nds to rise. leaving in the shor t-circuit state, the temperatur e of this ic will continue rising and activate the thermal protection. once the thermal protection stops the outpu t, the temperature of the ic will go down and operation will be restarted, after wh ich the output will repeat t he starting and stopping. although this effect will not destroy the ic, the thermal exposu re to the ic over prolonged hours may affect the peripherals su rrounding it. cin vin gnd cin vin co co gnd vin 1 pin l l feedback line feedback line avdd bypass capacitor
mb39c015 document number: 002-08364 rev. *a page 21 of 43 11. example of standard operation characteristics (shown below is an example of characteristics for connection according to ?test circuit for measuring typical operating characteristics?.) characteristics ch1 (continued) 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 ta = + 25 c v out = 1.2 v v in = 3.7 v v in = 3.0 v v in = 4.2 v v in = 5.0 v 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 v in = 3.7 v v in = 4.2 v v in = 3.0 v ta = + 25 c v out = 1.8 v v in = 5.0 v 0 10 20 30 40 50 60 70 80 90 100 1 10 100 100 0 ta = + 25 c v out = 3.3 v v in = 3.7 v v in = 4.2 v v in = 5.0 v 0 10 20 30 40 50 60 70 80 90 100 1 10 100 1000 v in = 3.7 v v in = 4.2 v v in = 3.0 v ta = + 25 c v out = 2.5 v v in = 5.0 v load current i out (ma) conversion efficiency ? (%) load current i out (ma) conversion efficiency ? (%) load current i out (ma) conversion efficiency ? (%) load current i out (ma) conversion efficiency ? (%) conversion efficiency vs. load current conversion efficiency vs. load current conversion efficiency vs. load current conversion efficiency vs. load current
mb39c015 document number: 002-08364 rev. *a page 22 of 43 (continued) 2.40 2.0 3.0 4.0 5.0 6.0 2.42 2.44 2.46 2.48 2.50 2.52 2.54 2.56 2.58 2.60 i out = 0 a i out = 100 ma 2.40 0 200 400 600 800 2.42 2.44 2.46 2.48 2.50 2.52 2.54 2.56 2.58 2.60 2.0 3.0 4.0 5.0 6.0 1.20 1.22 1.24 1.26 1.28 1.30 1.32 1.34 1.36 1.38 1.40 i out = 0 a i out = 100 ma v out = 2.5 v ta = + 25 c ? 50 0 +50 +100 1.20 1.22 1.24 1.26 1.28 1.30 1.32 1.34 1.36 1.38 1.40 v out = 2.5 v i out = 0 v v in = 3.7 v input voltage v in (v) output voltage v out (v) load current i out (ma) output voltage v out (v) output voltage vs. input voltage output voltage vs. load current ta ? ? 25 c v out ? 2.5 v setting ta ? ? 25 c v in ? 3.7 v v out ? 2.5 v setting reference voltage vs. input voltage reference voltage v ref (v) reference voltage vs. operating ambient temperature reference voltage v ref (v) input voltage v in (v) operating ambient temperature ta ( c )
mb39c015 document number: 002-08364 rev. *a page 23 of 43 (continued) 0 2.0 3.0 4.0 5.0 6.0 1 2 3 4 5 6 7 8 9 10 v out = 2.5 v ta = + 25 c ? 50 0 +50 +100 0 1 2 3 4 5 6 7 8 9 10 v out = 2.5 v v in = 3.7 v 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.0 3.0 4.0 5.0 6.0 ta = + 25 c v out = 1.8 v i out = 100 ma 1.6 1.8 1.7 1.9 2.0 2.1 2.2 2.3 2.4 ? 50 0 +50 +100 i out = 100 ma v out = 2.5 v v in = 3.7 v input current vs. operating ambient temperature input current i in (ma) input current vs. input voltage input current i in (ma) operating ambient temperature ta ( c ) input voltage v in (v) input voltage v in (v) oscillation frequency f osc (mhz) operating ambient temperature ta ( c ) oscillation frequency f osc (mhz) oscillation frequency vs. input voltage oscillation freque ncy vs. operating ambient temperature
mb39c015 document number: 002-08364 rev. *a page 24 of 43 (continued) 2.0 3.0 4.0 5.0 6.0 0 0.1 0.2 0.3 0.4 0.5 0.6 ta = + 25 c p-ch n-ch ? 50 0 +50 +100 0 0.1 0.2 0.3 0.4 0.5 0.6 v in = 3.7 v v in = 5.5 v ? 50 0 +50 +100 0 0.1 0.2 0.3 0.4 0.5 0.6 v in = 3.7 v v in = 5.5 v input voltage v in (v) mos fet on resistance r on ( ? ) operating ambient temperature ta ( c ) p-ch mos fet on resistance r onp ( ? ) operating ambient temperature ta ( c ) n-ch mos fet on resistance r onn ( ? ) mos fet on resistance vs. input voltage p-ch mos fet on resistance vs. operating ambient temperature n-ch mos fet on resistance vs. operating ambient temperature
mb39c015 document number: 002-08364 rev. *a page 25 of 43 (continued) 2.0 3.0 4.0 5.0 6.0 0.0 0.4 0.2 0.6 0.8 1.0 1.2 1.4 ta = + 25 c v out = 2.5 v v thlct v thhct 0.0 1.0 2.0 3.0 4.0 5.0 6.0 2.0 3.0 4.0 5.0 6.0 ta = + 25 c v porh = 3.7 v setting v xporh v xporl ? 50 0 +50 +85 +100 0 1000 500 1500 1250 3125 2000 2500 3000 3500 ? 50 0 +50 +85 +100 0 1000 500 1500 625 1563 2000 2500 3000 3500 operating ambient temperature ta ( c ) power dissipation p d (mw) operating ambient temperature ta ( c ) power dissipation p d (mw) power dissipation vs. operating ambient temperature (with thermal via) power dissipation vs. operating ambient temperature (without thermal via) input voltage v in (v) ctl threshold voltage v th (v) ctl threshold voltage v th vs. input voltage v thhct : circuit off on v thlct : circuit on off input voltage v in (v) xpor output voltage v xpor (v) xpor output voltage v xpor vs. input voltage
mb39c015 document number: 002-08364 rev. *a page 26 of 43 switching waveforms i lx : 500 ma/div v lx : 2.0 v/div v out : 20 mv/div ta = + 25 c v in = 3.7 v v out = 2.5 v i out = 800 ma 1 s/div
mb39c015 document number: 002-08364 rev. *a page 27 of 43 startup waveform v ctl : 5.0 v/div i lx : 500 ma/div v out : 1.0 v/div 10 ms/div ta = + 25 c v in = 3.7 v v out = 2.5 v i out = 0 a vrefin capacitor value = 0.1 ? f v ctl : 2.0 v/div i lx : 500 ma/div v out : 1.0 v/div ta = + 25 c v in = 3.7 v v out = 2.5 v i out = 0 a 10 s/div no vrefin capacitor
mb39c015 document number: 002-08364 rev. *a page 28 of 43 output waveforms at sudden load changes (0 ma ? 800 ma) output waveforms at sudden load changes (100 ma ? 800 ma) v out : 100 mv/div ta = + 25 c v in = 3.7 v v out = 2.5 v i out = 0 ma i out = 0 ma i out = 800 ma 10 s/div vrefin capacitor value ? 0.1 ? f ta = + 25 c v in = 3.7 v v out = 2.5 v i out = 100 ma i out = 800 ma i out = 100 ma v out : 100 mv/div 10 s/div vrefin capacitor value ? 0.1 ? f
mb39c015 document number: 002-08364 rev. *a page 29 of 43 12. application circuit examples application circuit example 1 ? an external voltage is input to the reference voltage external input (vrefin1, vrefin2) , and the v out voltage is set to 3.01 times the v out setting gain. v in cpu v out1 dac1 l1 2.2 h l2 2.2 h 4.7 f c1 4.7 f c2 mb39c015 c3 4.7 f 4.7 f ctl1 mode1 vrefin1 out1 xpor lx1 dvdd1 r8 1 m r7 1 m ctl2 mode2 vref vrefin2 vdet ctlp dvdd2 dgnd1 dgnd2 c4 0.1 f c5 avdd agnd out2 lx2 dac2 apli2 v out2 v out = 3.01 v refin 3 8 2 23 9 22 6 7 1 24 21 18 10 13 4 5 16 17 19 20 14 15 11 12 apli1
mb39c015 document number: 002-08364 rev. *a page 30 of 43 application circuit example 2 ? the voltage of vref pin is input to the reference voltage ex ternal input (vrefin1, vrefin2) by dividing resistors. the v out1 voltage is set to 2.5 v and v out2 voltage is set to 1.8 v. r8 1 m r6 300 k r2 r5 ( 22 k + 330 k ) 352 k r1 ( 20 k + 150 k ) 170 k 300 k r7 1 m cpu mb39c015 ctl1 vref vrefin1 ctl2 mode2 mode1 vrefin2 ctlp 3 8 2 23 6 9 22 1 v in c3 4.7 f 4.7 f dvdd1 dvdd2 dgnd1 dgnd2 c4 0.1 f c5 avdd agnd 4 5 16 17 19 20 14 15 11 12 out1 xpor lx1 out2 lx2 v out1 l1 2.2 h l2 2.2 h 4.7 f c1 4.7 f c2 apli2 v out2 24 21 18 10 13 apli1 v out1 = 3.01 v refin1 ( v ref = 1.30 v ) v ref v refin1 = r2 r1 + r2 1.30 v = 2.5 v v out1 = 3.01 300 k 170 k + 300 k 1.30 v = 1.8 v v out12 = 3.01 300 k 352 k + 300 k
mb39c015 document number: 002-08364 rev. *a page 31 of 43 application circuit example components list tdk : tdk corporation fdk : fdk corporation koa : koa corporation component item part number specification package vendor l1 inductor vlf4012at-2r2m 2.2 ? h, rdc ? 76 m ? smd tdk mipw3226d2r2m 2.2 ? h, rdc ? 100 m ? smd fdk l2 inductor vlf4012at-2r2m 2.2 ? h, rdc ? 76 m ? smd tdk mipw3226d2r2m 2.2 ? h, rdc ? 100 m ? smd fdk c1 ceramic capacitor c2012jb1a475k 4.7 ? f (10 v) 2012 tdk c2 ceramic capacitor c2012jb1a475k 4.7 ? f (10 v) 2012 tdk c3 ceramic capacitor c2012jb1a475k 4.7 ? f (10 v) 2012 tdk c4 ceramic capacitor c2012jb1a475k 4.7 ? f (10 v) 2012 tdk c5 ceramic capacitor c1608jb1e104k 0.1 ? f (50 v) 2012 tdk r1 resistor rk73g1jttd d 20 k ? rk73g1jttd d 150 k ? 20 k ? 150 k ? 1608 1608 koa koa r2 resistor rk73g1jttd d 300 k ? 300 k ? 1608 koa r5 resistor rk73g1jttd d 22 k ? rk73g1jttd d 330 k ? 22 k ? 330 k ? 1608 1608 koa koa r6 resistor rk73g1jttd d 300 k ? 300 k ? 1608 koa r7 resistor rk73g1jttd d 1 m ? 1 m ? ? 0.5% 1608 koa r8 resistor rk73g1jttd d 1 m ? 1 m ? ? 0.5% 1608 koa
mb39c015 document number: 002-08364 rev. *a page 32 of 43 13. usage precautions 1. do not configure the ic over the maximum ratings if the lc is used over the maximum ratings, the lsl may be permane ntly damaged.it is preferable for the device to normally oper ate within the recommended usage conditions. usa ge outside of these conditions adversel y affect the reliability of the lsi. 2. use the devices within recommended operating conditions the recommended operating conditions are the conditions under which the lsl is guaranteed to operate.the electrical ratings are guaranteed when the device is used within the recommended operati ng conditions and under the condi tions stated for each item. 3. printed circuit board ground lines should be set up with consideration for common impedance 4. take appropriate static electricity measures ? containers for semiconductor materials should have anti-static protection or be made of conductive material. ? after mounting, printed circuit boards should be st ored and shipped in conductive bags or containers. ? work platforms, tools, and instruments should be properly grounded. ? working personnel should be grounded with resistance of 250 k ? to 1 m ? between body and ground. 5. do not apply negative voltages the use of negative voltages below ? 0.3 v may create parasitic transistors on ls i lines, which can cause abnormal operation. 14. ordering information part number package remarks mb39c015wqn 24-pin plastic qfn (lcc-24p-m10) exposed pad
mb39c015 document number: 002-08364 rev. *a page 33 of 43 15. rohs compliance informati on of lead (pb) free version the lsi products of cypress with ?e1? are compliant with rohs directive, and has observ ed the standard of lead, cadmium, mercur y, hexavalent chromium, polybrominated biphenyls ( pbb), and polybrominated diphenyl ethers (pbde). a product whose part number has trailin g characters ?e1? is rohs compliant. 15.1 marking format (lead free version) 15.2 labeling sample (lead free version) index 39c015 xe1 xxxxxx lead-free version(e1) 2006/03/01 assembled in japan g qc pass (3n) 1mb123456p-789-ge1 1000 (3n)2 1561190005 107210 1,000 pcs 0605 - z01a 1000 1/1 1561190005 mb123456p - 789 - ge1 mb123456p - 789 - ge1 mb123456p - 789 - ge1 pb lead-free mark jeita logo jedec logo the part number of a lead-free product has the trailing characters ?e1?. ?assembled in china? is printed on the label of a product assembled in china.
mb39c015 document number: 002-08364 rev. *a page 34 of 43 16. evaluation bo ard specification the mb39c015 evaluation board provides the proper for evaluating the efficiency and other characteristics of the mb39c015. terminal information startup terminal information symbol functions vin power supply terminal in standard condition 3.1 v to 5.5 v* * : when the vin/vout difference is to be held wit hin 0.6 v or less, such as for devices with a standard output voltage (vout1 ? 2.5 v) when vin < 3.1 v, cypress recommends changing the output capacity (c1, c2) to 10 ? f. vout1, vout2 output terminals (vout1: ch1, vout2: ch2) vctl power supply terminal for setting the ctl1, ctl2 and ctlp terminals. use by connecting with ctl1,ctl2 and ctlp. ctl1, ctl2 direct supply terminal of ctl (ctl1 : for ch1, ctl2 : for ch2) ctl1, ctl2 ? 0 v to 0.8 v (typ.) : shutdown ctl1, ctl2 ? 0.95 v (typ.) to v in (5 v max) : normal operation mode1, mode2 test terminal mode1, mode2 ? open or gnd vref reference voltage output terminal vref ? 1.30 v (typ.) vrefin1, vrefin2 external reference voltage input terminals (vrefin1 : for ch1, vrefin2 : for ch2) when an external reference voltage is suppli ed, connect it to the terminal for each channel. vdet voltage input terminal for voltage detection ctlp voltage detection circuit block control terminal ctlp ? l : voltage detection circuit block stop ctlp ? h : normal operation xpor voltage detection circuit output terminal the n-ch mos open drain circuit is connected. vxpor pull-up voltage termi nal for the xpor terminal pgnd ground terminal connect power supply gnd to the pgnd terminal next to the vin terminal. connect output (load) gnd to the pgnd terminal between the vout1 terminal and the vout2 terminal. agnd ground terminal terminal name condition functions ctl1 l : open h : connect to vctl on/off switch for ch1 l : shutdown h : normal operation. ctl2 l : open h : connect to vctl on/off switch for ch2 l : shutdown h : normal operation. ctlp l : open h : connect to vctl on/off switch for the voltage detection block l: stops the voltage detection circuit h: normal operation.
mb39c015 document number: 002-08364 rev. *a page 35 of 43 jumper information setup and checkup 1. setup a. connect the ctl1 terminal and the ctl2 terminal to the vctl terminal. b. put it into ?l? state by connecting the ctlp terminal to the agnd pad. c. connect the power supply terminal to the vin terminal, and the power supply gnd terminal to the pgnd terminal. make sure pgnd is connected to the pgnd terminal next to the vin te rminal. (example of setting power-supply voltage : 3.7 v) 2. checkup supply power to vin. the ic is operating norma lly if vout1 = 2.5 v (typ) and vout2 = 1.8 v (typ). jp functions jp1 short-circuited in the layout pattern of the board (normally used shorted). jp2 short-circuited in the layout pattern of the board (normally used shorted). jp3 normally used shorted (0 ? ) jp6 normally used shorted (0 ? )
mb39c015 document number: 002-08364 rev. *a page 36 of 43 component layout on the evaluation board (top view) MB39C015EVB-06 rev.1.0 r5 mode2 vrefin2 xpor vxpor vout2 pgnd pgnd vin vout1 l2 l1 c2 c1 c3 c7 c6 c5 c4 m1 vctl agnd sw1 vref mode1 vrefin1 r2 r7 r6 - 2 jp6 jp3 r4 - 2 r1 - 1 mode2 mode1 ctl2 ctl1 ctl1 ctlp vdet ctl2 ctlp r1 - 2 r4 - 1 r6 - 1 r1 - 3 r9 r8 r10 r3 jp1 jp2 short open top side (component side) bottom side (soldering side)
mb39c015 document number: 002-08364 rev. *a page 37 of 43 evaluation board layout (top view) top side (layer1) inside vin & gnd (layer3) inside gnd (layer2) bottom side (layer4)
mb39c015 document number: 002-08364 rev. *a page 38 of 43 connection diagram 3 vin vin jp3 sw1* vref vref vref vin vdet vref sw1* sw1* sw1* r8 r7 r9 r5 r2 r3 r10 c7 r6-1 r6-2 r4-1 r4-2 r1-3 r1-1 r1-2 c6 c3 c4 dvdd1 dvdd2 dgnd1 dgnd2 avdd agnd lx1 out1 lx2 out2 xpor vxpor vout2 vout1 pgnd xpor agnd c5 l1 c1 c2 jp1 l2 jp2 jp6 i in i out i out pgnd vctl ctl1 ctl1 ctl2 ctlp vref vdet ctlp mode1 mode1 mode2 mode2 vrefin1 mb39c015 ctl2 vrefin1 vrefin2 vrefin2 11 12 14 15 19 20 16 17 5 4 13 10 18 21 24 9 8 2 22 23 6 7 1 sw1* * not mounted
mb39c015 document number: 002-08364 rev. *a page 39 of 43 component list note: these components are recommended based on the operating tests authorized. tdk : tdk corporation koa : koa corporation ssm : susumu co., ltd component part name model number specification package vendor remark m1 ic mb39c015wqn ? qfn-24 cypress l1 inductor vlf4012at-2r2m 2.2 ? h, rdc ? 76 m ? smd tdk l2 inductor vlf4012at-2r2m 2.2 ? h, rdc ? 76 m ? smd tdk c1 ceramic capacitor c2012jb1a475k 4.7 ? f (10 v) 2012 tdk c2 ceramic capacitor c2012jb1a475k 4.7 ? f (10 v) 2012 tdk c3 ceramic capacitor c2012jb1a475k 4.7 ? f (10 v) 2012 tdk c4 ceramic capacitor c2012jb1a475k 4.7 ? f (10 v) 2012 tdk c5 ceramic capacitor c1608jb1h104k 0.1 ? f (50 v) 1608 tdk c6 ceramic capacitor c1608jb1h104k 0.1 ? f (50 v) 1608 tdk c7 ceramic capacitor c1608jb1h104k 0.1 ? f (50 v) 1608 tdk r1-1 jumper rk73z1j 50 m ? max, 1 a 1608 koa r1-2 resistor rr0816p-304-d 300 k ? ? 0.5% 1608 ssm r1-3 jumper rk73z1j 50 m ? max, 1 a 1608 koa r2 resistor rr0816p-753-d 75 k ? ? 0.5% 1608 ssm r3 resistor rk73g1jttd d 1 m ? 1 m ? ? 0.5% 1608 koa r4-1 resistor rr0816p-223-d 22 k ? ? 0.5% 1608 ssm r4-2 resistor rr0816p-334-d 330 k ? ? 0.5% 1608 ssm r5 resistor rr0816p-304-d 300 k ? ? 0.5% 1608 ssm r6-1 resistor rr0816p-203-d 20 k ? ? 0.5% 1608 ssm r6-2 resistor rr0816p-154-d 150 k ? ? 0.5% 1608 ssm r7 resistor rr0816p-304-d 300 k ? ? 0.5% 1608 ssm r8 resistor rk73g1jttd d 1 m ? 1 m ? ? 0.5% 1608 koa r9 resistor rk73g1jttd d 1 m ? 1 m ? ? 0.5% 1608 koa r10 resistor rk73g1jttd d 1 m ? 1 m ? ? 0.5% 1608 koa sw1 switch ? ? ? ? not mounted jp1 jumper ? ? ? ? pattern- shorted jp2 jumper ? ? ? ? pattern- shorted jp3 jumper rk73z1j 50 m ? max, 1 a 1608 koa jp6 jumper rk73z1j 50 m ? max, 1 a 1608 koa
mb39c015 document number: 002-08364 rev. *a page 40 of 43 17. ev board ordering information ev board part no. ev board version no. remarks MB39C015EVB-06 MB39C015EVB-06 rev.1.0 qfn-24
mb39c015 document number: 002-08364 rev. *a page 41 of 43 18. package dimension 24-pin plastic qfn lead pitch 0.50 mm package width package length 4.00 mm 4.00 mm sealing method plastic mold mounting height 0.80 mm max weight 0.04 g 24-pin plastic qfn (lcc-24p-m10) (lcc-24p-m10) +0.03 ? 0.02 ? .001 +.001 0.02 (.001 ) c 2009-2010 fujitsu semiconductor limited c24060s-c-1-2 index area (.157 .004) 4.00 0.10 4.00 0.10 (.157 .004) 2.60 0.10 0.50(.020) typ (.016 .002) 0.40 0.05 1pin corner (c0.35(c.014)) 0.25 0.05 (.010 .002) (.030 .002) 0.75 0.05 (0.20(.008)) (.102 .004) 2.60 0.10 (.102 . 004) dimensions in mm (inches). note: the values in parentheses are reference values.
mb39c015 document number: 002-08364 rev. *a page 42 of 43 document history document title: mb39c015 2ch dc/dc converter ic datasheet document number: 002-08364 revision ecn orig. of change submission date description of change ** ? taoa 07/16/2008 initial release *a 5148534 taoa 03/01/2016 migrated spansion datasheet from ds04-27254-3e to cypress format
document number: 002-08364 rev. *a revised march 1, 2016 page 43 of 43 mb39c015 ? cypress semiconductor corporation 2008-2016. this document is the property of cypress semiconductor corporation and its subsi diaries, including spansion llc ("cypress"). this document, including any software or firmware included or referenced in this document ("software"), is owned by cypress under the intellec tual property laws and treaties of the united states and other countries worldwide. cypress reserves all rights under such laws and treaties and does not, except as specifically stated in this paragr aph, grant any license under its patents, copyrights, trademarks, or other intellectual property rights. if the software is not accompanied by a license agreement and you do not otherwise have a writte n agreement with cypress governing the use of the software, then cypress hereby grants you under its copyright rights in the software, a personal, non-exclusive, nontransferable license (without the r ight to sublicense) (a) for software provided in source code form, to modify and reproduce the software solely for use with cypress hardware products, only internally within your organization, and (b) to distribute the software in binary code form externally to end users (either directly or indirectly through resellers and distributors), solely for use on cypress hardware product units. cypress also gran ts you a personal, non-exclusive, nontransferable, license (without the right to sublicense) under those claims of cypress's patents that are infringed by the software (as provided by cypress, unmodified) to make, use, distribute, and import the software solely to the minimum extent that is necessary for you to exercise your rights under the copyright license granted in the previous sentence. any oth er use, reproduction, modification, translation, or compilation of the software is prohibited. cypress makes no warranty of any kind, express or implied, with regard to this document or any software, including, but not lim ited to, the implied warranties of merchantability and fitness for a particular purpose. cypress reserves the right to make changes to this document without further notice. cypress does not assume any liability arising out of the application or use of an y product or circuit described in this document. any informati on provided in this document, including any sample design information or programming code, is provided only for reference purposes. it is the responsibility of the user of this document to properly d esign, program, and test the functionality and safety of any application made of this information and any resulting product. cypress products are not designed, intended, or authorized for use as crit ical components in systems designed or intended for the operation of weapons, weapons systems, nuclear installations, life-support de vices or systems, other medical devices or systems (including r esuscitation equipment and surgical implants), pollution control or hazardous substances management, or other uses where the failure of the device or system could cause personal injury, death, or property damage ("unintended uses"). a critical component is any component of a device or system whose failure to perform can be reasonably expected to cause the failure of the device or syste m, or to affect its safety or effectiv eness. cypress is not liable, in whole or in part, and company shall and hereby does release cypress from any claim, damage, or other liability arising from or relate d to all unintended uses of cypress products. company shall indemnify and hold cypress harmless from and against all claims, costs, damages, and other liabilities, including claims for personal inj ury or death, arising from or related to any unintended uses of cypress products. cypress, the cypress logo, spansion, the spansion logo, and combinations thereof, psoc, capsense, ez-usb, f-ram, and traveo are trademarks or registered trad emarks of cypress in the united states and other countries. for a more complete list of cypre ss trademarks, visit cypress.com. other names and brands may be claimed as property of their respective owners. sales, solutions, and legal information worldwide sales and design support cypress maintains a worldwide network of offices, solution center s, manufacturer?s representatives, and distributors. to find t he office closest to you, visit us at cypress locations . products arm ? cortex ? microcontrollers cypress.com/arm automotive cypress.com/automotive clocks & buffers cypress.com/clocks interface cypress.com/interface lighting & power control cypress.com/powerpsoc memory cypress.com/memory psoc cypress.com/psoc touch sensing cypress.com/touch usb controllers cypress.com/usb wireless/rf cypress.com/wireless psoc ? solutions cypress.com/psoc psoc 1 | psoc 3 | psoc 4 | psoc 5lp cypress developer community community | forums | blogs | video | training technical support cypress.com/support


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